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| E2B0031-27-Y2 Semiconductor MSM6778 Semiconductor 120-DOT COMMON DRIVER (TAB) This version: Nov. 1997 MSM6778 Previous version: Mar. 1996 GENERAL DESCRIPTION The MSM6778 is a dot-matrix LCD common driver. Fabricated in CMOS technology, the device contains two 60-bit bidirectional shift registers, two 60-bit level shifters, and two 60-bit 4-level drivers. The MSM6778 has 120 LCD outputs. The number of LCD outputs can be increased by cascading MSM6778 devices, using cascade-connected I/O pins. The bias voltage which specifies a drive level can optionally be supplied externally. The MSM6778 is suitable for various types of LCD panel. FEATURES * Logic supply voltage : 2.7 V to 5.5 V * LCD drive voltage : A wide range from 18 V to 28 V * Applicable LCD duty : 1/100 to 1/256 * The bias voltage can be externally supplied. * Structure: 35mm-wide Tape Automated Bonding (TAB) film (Product name: MSM6778AV-Z-01) Tin-plating 1/7 Semiconductor MSM6778 BLOCK DIAGRAM O1 O2 O 59 O 60 V1L V2L V5L VEEL 60-BIT 4-LEVEL DRIVER VDD VEE DF 60-BIT LEVEL SHIFTER DISPOFF VDD VSS SHL IO 1 CP 60-BIT BI-DIRECTIONAL SHIFT REGISTER IO 60 VDDL,VDDR VSS IO 61 60-BIT BI-DIRECTIONAL SHIFT REGISTER IO 120 VDD VSS 60-BIT LEVEL SHIFTER V1R V2R V5R VEER 60-BIT 4-LEVEL DRIVER VDD VEE O 61 O 62 O 119 O 120 2/7 Semiconductor MSM6778 PIN CONFIGURATION (TOP VIEW) (LCD output side) O1 O2 O119 O120 Chip surface 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 (Input pin side) Input Pin Name Pin 1 2 3 4 5 6 7 8 9 10 Symbol V1L V2L V5L VEEL VDDL SHL VSS DISPOFF IO1 IO60 Pin 11 12 13 14 15 16 17 18 19 Symbol IO61 IO120 DF CP VDDR VEER V5R V2R V1R 3/7 Semiconductor MSM6778 ABSOLUTE MAXIMUM RATINGS Parameter Power Supply Voltage (1) Power Supply Voltage (2) Input Voltage Storage Temperature Symbol VDD VDD-VEE* VI TSTG Condition Ta=25C Ta=25C Ta=25C -- Rating -0.3 to +6.5 0 to 30 -0.3 to VDD+0.3 -30 to +85 Unit V V V C * V1>V2>V5>VEE, VDD > V1>V2 >VDD-10V, VEE+10V >V5>VEE = = = VDD=VDDL=VDDR, V1=V1L=V1R, V2=V2L=V2R, V5=V5L=V5R, VEE=VEEL=VEER RECOMMENDED OPERATING CONDITIONS Parameter Power Supply Voltage (1) Power Supply Voltage (2) Operating temperature Symbol VDD VDD-VEE* Top Condition -- Range 2.7 to 5.5 14 to 28 18 to 28 -20 to +75 Unit V V V C No load During liquid crystal driving -- * V1>V2>V5>VEE, VDD >V1>V2 >VDD-7V, VEE+7V >V5>VEE = = = VDD=VDDL=VDDR, V1=V1L=V1R, V2=V2L=V2R, V5=V5L=V5R, VEE=VEEL=VEER Note: Unlike mold packages, The Tape Carrier Package (TCP) cannot shield a light. Please shield a light to secure the electrical characteristics. ELECTRICAL CHARACTERISTICS DC Characteristics (VDD=2.7 to 5.5 V, Ta= -20 to +75C) Parameter "H" Input Voltage "L" Input Voltage "H" Input Current "L" Input Current "H" Output Voltage "L" Output Voltage ON Resistance Supply Current Input Capacitance Symbol VIH *1 VIL *1 IIH *1 IIL *1 VOH *2 VOL *2 RON *4 IDD *5 IEE *5 CI Condition -- -- VI=VDD, VDD=5.5 V VI=0 V, VDD=5.5 V IO=-0.2 mA, VDD=2.7 V IO=0.2 mA, VDD=2.7 V VDD-VEE=25 V, *3 I VN-VO I=0.25 V CP=28 kHz, VDD=3.0 V VDD-VEE=25 V, No load f=1 MHz -- -- -- -- -- -- 60 400 -- mA mA pF Min. 0.8 VDD -- -- -- VDD-0.4 -- -- Typ. -- -- -- -- -- -- -- 0.4 2.0 Max. -- 0.2 VDD 1 -1 Unit V V mA mA V V kW *1 *2 *3 *4 *5 Applicable to pins CP, IO1,IO60,IO61, IO120, SHL, DF, DISPOFF Applicable to pins IO1, IO60, IO61, IO120 VN=V1, V2, V5, VEE, V2=1/16 (VDD-VEE), V5=15/16 (VDD-VEE) Applicable to pins O1 to O120 IDD shows the supply current between VDD and VSS. IEE shows the supply current between VDD and VEE. Note: The above values are guaranteed when TCP is protected from light. 4/7 Semiconductor Switching Characteristics MSM6778 (VDD=2.7 to 5.5 V, Ta= -20 to +75C, CL=15 pF) Parameter IO1, IO61 (IO60, IO120) "H", "L" Propagation Delay Time Clock Frequency CP Pulse Width Data Setup Time IO1, IO61 AE CP (IO60, IO120 AE CP) Data Hold Time CP AE IO1, IO61 (CP AE IO60, IO120) CP Rise, Fall Time tr (CP) tf (CP) -- -- -- 20 ns Symbol tPLH tPHL fCP tWCP tSETUP -- -- -- -- 63 100 -- -- -- 1 -- -- MHz ns ns Condition -- Min. *1 Typ. -- Max. 3 Unit ms tHOLD -- 100 -- -- ns *1 The relationship between tPLH (tPLH) Min. and tHOLD Min. satisfies the operation in a cascade connection state. Note 1: When display is controlled by DISPOFF pin, CP rise and fall time must be 1 ms. Note 2: The above values are guaranteed when TCP is protected from light. tf (CP) tWCP CP 0.8VDD 0.2VDD tSETUP IO1 (IO60) IO61 (IO120) 0.8VDD 0.2VDD tPLH (tPHL) IO60 (IO1) IO120 (IO61) 0.8VDD 0.2VDD tHOLD tWCP 0.8VDD 0.2VDD tr (CP) 5/7 Semiconductor MSM6778 FUNCTIONAL DESCRIPTION Pin Functional Description * IO1, IO60, IO61, IO120 These are I/O pins of the two 60-bit bidirectional shift registers. * SHL This pin selects the shift direction of the two 60-bit bidirectional shift registers. Set this pin to "H" or "L" level during power-on. SHL Shift Direction L O1 AE O60 O61 AE O120 I/O pins IO1, IO61 IO60, IO120 Function Input IO1 and IO61 are data input pins for the shift Output register. The entered data is read in at the falling edge of a clock pulse. The data is output from IO60 and IO120 behind the number of bits (60) of the shift register. H O60 AE O1 O120 AE O61 IO60, IO120 IO1, IO61 Input IO60 and IO120 are data input pins for the shift Output register. The entered data is read in at the falling edge of a clock pulse. The data is output from IO1 and IO61 behind the number of bits (60) of the shift register. * CP This is a clock pulse input for the two 60-bit bidirectional shift registers. Scan data is shifted at the falling edge of a clock pulse. * DF This is a synchronous signal input for alternate signal for LCD driving. * DISPOFF This is an input used to control the output levels of O1 to O120. During low level input, the V1 level is output from the output pins O1 to O120 independently of the data of the shift register. See the truth table. * O1 to O120 These are outputs for the 4-level drivers, which correspond directly to each bit of the shift register. One of the four levels V1, V2, V5, and VEE is selected and output depending on the combination of the shift register data and a DF signal. See the Truth Table. * V1L, V2L, V5L, VEEL, V1R, V2R, V5R, VEER These are LCD drive bias voltage inputs. * VDDL, VDDR, VSS These are power supply pins for the device. VDD is usually from 2.7 V to 5.5 V and VSS is 0 V. 6/7 Semiconductor Truth Table DF L L H H X SHIFT REGISTER DATA MSM6778 DISPOFF H H H H L DRIVER OUTPUT (O1 to O120) V2 VEE V5 V1 V1 L H L H X X : Don't care NOTES ON USE (when turning the power ON or OFF) The LCD drivers of this IC require a high voltage. For this reason, if a high voltage is applied to the LCD drivers with the logic power supply floating, excess current flows. This may damage the IC. Be sure to follow the sequence below when turning the power ON or OFF. Power ON : Logic circuits ON AE LCD drivers ON, or both ON at a time Power OFF : LCD drivers OFF AE logic circuits OFF, or both OFF at a time 7/7 |
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